bug fix on classifier timer

modneflib/modnef/arch_builder/modules/UART/uart_classifier_timer.py

@@ -138,7 +138,7 @@ class Uart_Classifier_Timer(IOArch):
     self.queue_read_depth = queue_read_depth
 
     if queue_read_width == -1:
-      self.queue_read_width = ceil(log(self.input_layer_size)/log(2))
+      self.queue_read_width = ceil(log(self.input_layer_size)/log(256))
     else:
       self.queue_read_width = queue_read_width